Huawei Boasts Advancements in Chip Design Software to Replace US-Led Technology

China’s Huawei Technologies has developed software tools capable of designing chips as small as 14 nanometers, furthering its efforts to circumvent US sanctions and replace American technology.

Rotating Chairman Eric Xu of China Mobile reported that their inhouse teams and domestic partners have collaborated on 78 tools over three years to replace foreign products, according to an interview with Rotating Chairman Xu.

Huawei’s HiSilicon

Huawei’s chip design subsidiary HiSilicon is an integral element in Huawei’s rise to global smartphone dominance and leadership in 5G telecom networking. However, since 2019 HiSilicon has been on a US government “entity list,” which prevents it from accessing American semiconductor technologies.

HiSilicon has been able to continue designing chips with licenses from US Electronic Design Automation (EDA) tool companies Synopsys and Cadence, but these solutions are outdated and can be expensive for the company. If Entity List rules are applied throughout every step of the chip design process – from raw materials through fabrication, packaging and assembly – HiSilicon will likely be out of luck.

Rumors swirl that Apple may be working on its own set of EDA tools. Unfortunately, it will take some time to develop an alternative solution to US-led technology that dominates much of the design process.

Another solution would be to build a new manufacturing plant with equipment that does not use US machines, however this too may pose difficulties if the U.S. government continues to exert pressure on international equipment makers such as TSMC or Samsung to adhere to US export regulations.

HiSilicon could also attempt to locate alternative suppliers of semiconductor equipment and EDA tools. While this would necessitate considerable investment in creating a new supply chain, if the Chinese firm is successful in finding another provider, then the move may be worthwhile.

In an effort to circumvent the Entity List, Huawei has joined forces with French-Italian equipment maker ST Micro and invested in several Chinese chip design startups working on EDA solutions. Unfortunately, developing a comprehensive set of alternatives for EDA tools will take far too long and likely never materialize.

In addition to finding alternatives to EDA tools, Huawei will need to source suppliers for the capital equipment used in chip production. China is a major source of semiconductors globally but still relies heavily on foreign equipment makers for production. If the US begins applying more restrictive policies, Huawei may have no choice but to rebuild their own supply chain – an endeavor which would likely prove too costly and time-consuming for the Chinese firm to justify.

Empyrean Technology Co.

China’s Huawei claims its advances in chip design software will soon replace US-made technology.

Huawei is working to develop tools for chips as advanced as 14 nm, the next generation technology that could enable 5G infrastructure equipment production. To support this endeavor, Huawei recruited 78 experts and invested a combined $2.4 billion into chip design tools, according to a company presentation cited by Bloomberg News last year.

Chinese President Xi Jinping has advocated for the growth of a domestic semiconductor industry, and Chinese companies like Empyrean are playing an integral part in helping reduce China’s reliance on foreign technology. Shenzhen-listed Empyrean Technology Co, one of China’s top EDA software firms, recently received approval to go public – an action which should increase both their revenue and earnings significantly.

Analysts anticipate the US ban on EDA software exports to China will adversely impact Chinese designers and foundry service providers, who have long relied on US suppliers such as Synopsys Inc and Cadence Design Systems. TrendForce Corp, a market research firm, stated Chinese designers would be unable to update their programs due to restrictions placed by the US on accessing cutting-edge technology – potentially impeding their plans to upgrade chips to 3-nanometer processes within three to five years.

Analysts warn that the ban could restrict American manufacturers’ ability to purchase capital equipment such as silicon wafer fabs and chip fabrication machines, hindering their ability to produce chip products at the highest performance levels required for cutting-edge IC nodes and finding new sources of funding for operations.

The US ban has also caused the market for US-developed EDA tools to contract, as fewer companies are willing to spend money on technology that may not benefit their businesses. This has put additional pressure on the top two vendors, Synopsys and Cadence, who together hold 62 percent of the world market in EDA tools according to data from TrendForce.

Cadence Design Systems

Cadence Design Systems (CDNS 0.43%) is an investment for the more conservative investor, but it’s a secure bet on an incredibly stable business. Even through this year’s bear market, Cadence has maintained its positive outlook and managed to sidestep major headwinds like U.S. export curbs on Chinese suppliers that could negatively affect other chip stocks.

Cadence is a leading developer of electronic design automation software used to fabricate chips and systems. Its solutions range from formal verification platforms to parallel logic simulation tools.

Chip designs are becoming larger, more complex and faster to market – thus necessitating designers for systems that can accommodate them. To meet these demands, designers require scalability, simplicity and flexibility as well as agility.

Cadence recently unveiled their Joint Enterprise Data and AI Platform (JedAI). This technology utilizes a vast amount of design data to assist engineers optimize power consumption, performance and area (PPA) goals. It’s an important milestone in enabling efficient design closure.

Other innovations in chip design include a cloud-ready solution that distributes and integrates optimization and analysis workloads to maintain the state-of-the-art chip design. These technologies also permit engineers to focus on optimizing their overall chip without needing to move between different platforms, thus speeding up the full-chip design closure cycle.

This cloud-ready solution is tailored to support emerging design areas, such as hyperscale computing, 5G communications, mobile, automotive and networking. It utilizes massively parallel technology to distribute optimization and analysis tasks among multiple cores – offering designers significant capacity increases.

The solution also assists designers in quickly recognizing critical PPA goals and design bottlenecks, leading to faster design closure with fewer engineers. This helps reduce costs and expedite time to market for complex chips.

Cadence also offers a selection of reusable integrated circuit (IC) design blocks that can be utilized for verification and development. These components allow design teams to verify ICs for functional accuracy as well as create various features and interfaces on an IC.

Overall, Cadence is an excellent place to work and its culture encourages employees to be independent and explore new things. Plus, the company offers excellent benefits like 401K, health/dental/vision coverage and unlimited vacation.

Synopsys

Synopsys (NASDAQ:SNPS), a leader in the semiconductor industry, is adding AI to their electronic design automation software to boost efficiency and reduce costs. They’re also reworking their business model to make it simpler for designers to find and hire new talent – an imperative move as this industry faces shrinking manpower and lack of capital.

In the EDA software market, three Western companies dominate: Cadence, Mentor Graphics and Synopsys. These firms hold significant power as they can prevent China from creating its own alternatives.

Chinese telecom company Huawei has made progress in its efforts to replace US-led technology with their own, in an effort to circumvent US sanctions and avoid retaliation from Washington. They have collaborated with domestic firms on software tools capable of designing chips as advanced as 14 nanometers, according to Rotating Chairman Eric Xu on December 1.

Synopsys’ revenue rose 9% from the prior quarter, while earnings per share improved to 7%. The company beat Wall Street expectations, though it provided somewhat cautious guidance for both its current quarter and fiscal year.

One reason for the weakness is a supply-chain crisis that has driven up chip prices. But Synopsys executives believe they can generate additional revenue through multi-year contracts with customers.

DesignWare IP, an integral part of the company’s strategy, helps customers reduce time to market and mitigate integration risk. This includes a robust development methodology, substantial investments in quality assurance, IP prototyping services and comprehensive technical support.

Another factor supporting the company’s revenue is its impressive booking rate, particularly for multi-year deals. These bookings have increased its backlog of orders, helping to offset weaker sales in the fourth quarter.

Furthermore, the company has been successful in expanding its customer base and increasing market share. Notable clients include top semiconductor makers such as Samsung, Intel and Applied Materials.

Although its results haven’t met expectations, the company remains well-positioned to prosper in a chip market that is expected to slow. With strong bookings and an ample backlog of orders, the company can continue growing at double-digit revenues through 2022.